问题描述：
英语翻译
最近小弟正在翻译一篇英文论文,可是参考文献的翻译格式不太了解,
[1] A.-J.Annema,B.Nauta,R.van Langevelde and H.Tuinhout,“模拟电路在超深亚微米的CMOS,” IEEE J.固态电路,vol.40,no.1,pp.132-143,Jan.2005.
[2] B.Murmann,P.Nikaeen,D.J.Connelly and R.W.Dutton; “Impact of scaling on analog performance and associated modeling needs,” IEEE Trans.Electron Devices,vol.53,no.9,pp.2160-2167,Sept.2006.
[3] X.Peng and W.Sansen,“Transconductance with capacitances feedback compensation for multistage amplifiers,” IEEE J.Solid-State Circuits,vol.40,no.7,pp.1515–1520,July 2005.
[4] A.D.Grasso,G.Palumbo and S.Pennisi,“Three-Stage CMOS OTA for large capacitive loads with efficient frequency compensation scheme,” IEEE Trans.Circuits Syst.II,vol.53,no.10,pp.347-352,Oct.2006.
[5] F.You,H.K.Embabi,and E.S′anchez-Sinencio,“Multistage amplifier topologies with nested Gm-C compensation,” IEEE J.Solid-State Circuits,vol.32,no.12,pp.2000–2011,Dec.1997.
[6] H.-T.Ng,R.M.Ziazadeh,and D.J.Allstot,“A multistage amplifier technique with embedded frequency compensation,” IEEE J.Solid-State Circuits,vol.34,no.3,pp.339–347,Mar.1999.
[7] B.K.Thandri and J.Silva-Martinez,“A robust feedforward compensation scheme for multistage operational transconductance amplifiers with no Miller capacitors,” IEEE J.Solid-State Circuits,vol.38,no.2,pp.237–243,Feb.2003.
[8] W.Yan and H.Zimmermann,“Current-mode common-mode feedback for constant signal behavior control in rail-to-rail input realization,” Electron.Lett.,vol.44,no.10,pp.609–610,May 2008.
[9] T.Song,J.Hu,X.Li and S.Yan “A constant-gm constant-slew-rate railto-rail input stage with static feedback and dynamic current steering for VLSI cell libraries”,IEEE Trans.Circuits Syst.II,vol.54,pp.76-80,Jan.2007.
[10] J.M.Carrillo,J.F.Duque-Carrillo,G.Torelli and J.Austin,“Constant-gm constant slew rate high bandwidth low voltage rail-to-rail CMOS input stage for VLSI cell libraries,” IEEE J.Solid-State Circuits,vol.38,no.8,pp.1364-1372,Aug.2003.
[11] J.M.Carrillo,G.Torelli,R.Perez-Aloe and J.F.Duque-Carrillo “1-V rail-to-rail CMOS OpAmp with improved bulk-driven input stage,” IEEE J.Solid-State Circuits,vol.42,no.3,pp.508-517,March 2007.
[12] T.W.Fischer,A.I.Karsilayan and E.S′anchez-Sinencio,“A rail-to-rail amplifier input stage with 0.35%gm fluctuation,” IEEE Trans.Circuits Syst.I,vol.52,no.2,pp.271-282,Feb.2005.
最近小弟正在翻译一篇英文论文,可是参考文献的翻译格式不太了解,
[1] A.-J.Annema,B.Nauta,R.van Langevelde and H.Tuinhout,“模拟电路在超深亚微米的CMOS,” IEEE J.固态电路,vol.40,no.1,pp.132-143,Jan.2005.
[2] B.Murmann,P.Nikaeen,D.J.Connelly and R.W.Dutton; “Impact of scaling on analog performance and associated modeling needs,” IEEE Trans.Electron Devices,vol.53,no.9,pp.2160-2167,Sept.2006.
[3] X.Peng and W.Sansen,“Transconductance with capacitances feedback compensation for multistage amplifiers,” IEEE J.Solid-State Circuits,vol.40,no.7,pp.1515–1520,July 2005.
[4] A.D.Grasso,G.Palumbo and S.Pennisi,“Three-Stage CMOS OTA for large capacitive loads with efficient frequency compensation scheme,” IEEE Trans.Circuits Syst.II,vol.53,no.10,pp.347-352,Oct.2006.
[5] F.You,H.K.Embabi,and E.S′anchez-Sinencio,“Multistage amplifier topologies with nested Gm-C compensation,” IEEE J.Solid-State Circuits,vol.32,no.12,pp.2000–2011,Dec.1997.
[6] H.-T.Ng,R.M.Ziazadeh,and D.J.Allstot,“A multistage amplifier technique with embedded frequency compensation,” IEEE J.Solid-State Circuits,vol.34,no.3,pp.339–347,Mar.1999.
[7] B.K.Thandri and J.Silva-Martinez,“A robust feedforward compensation scheme for multistage operational transconductance amplifiers with no Miller capacitors,” IEEE J.Solid-State Circuits,vol.38,no.2,pp.237–243,Feb.2003.
[8] W.Yan and H.Zimmermann,“Current-mode common-mode feedback for constant signal behavior control in rail-to-rail input realization,” Electron.Lett.,vol.44,no.10,pp.609–610,May 2008.
[9] T.Song,J.Hu,X.Li and S.Yan “A constant-gm constant-slew-rate railto-rail input stage with static feedback and dynamic current steering for VLSI cell libraries”,IEEE Trans.Circuits Syst.II,vol.54,pp.76-80,Jan.2007.
[10] J.M.Carrillo,J.F.Duque-Carrillo,G.Torelli and J.Austin,“Constant-gm constant slew rate high bandwidth low voltage rail-to-rail CMOS input stage for VLSI cell libraries,” IEEE J.Solid-State Circuits,vol.38,no.8,pp.1364-1372,Aug.2003.
[11] J.M.Carrillo,G.Torelli,R.Perez-Aloe and J.F.Duque-Carrillo “1-V rail-to-rail CMOS OpAmp with improved bulk-driven input stage,” IEEE J.Solid-State Circuits,vol.42,no.3,pp.508-517,March 2007.
[12] T.W.Fischer,A.I.Karsilayan and E.S′anchez-Sinencio,“A rail-to-rail amplifier input stage with 0.35%gm fluctuation,” IEEE Trans.Circuits Syst.I,vol.52,no.2,pp.271-282,Feb.2005.
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